The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8653517 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 18, 2014

Filed:

Apr. 01, 2011
Applicants:

Tetsufumi Kawamura, Kodaira, JP;

Hiroyuki Uchiyama, Musashimurayama, JP;

Hironori Wakana, Hitachi, JP;

Inventors:

Tetsufumi Kawamura, Kodaira, JP;

Hiroyuki Uchiyama, Musashimurayama, JP;

Hironori Wakana, Hitachi, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a TFT that adopts an oxide semiconductor as an active layer and has a resistance layer interposed between the active layer and one of a source and drain electrode, while Vth close to 0 V and a small off current are sustained, an on-current is increased. In a thin-film transistor including a gate electrode, a gate insulating film, a semiconductor layer, a source electrode, and a drain electrode, the semiconductor layer that links the source electrode and drain electrode is made of a metal oxide. The semiconductor layer includes three regions of first, second, and third regions. The first region is connected with the source electrode, the third region is connected with the drain electrode, and the second region is connected between the first region and third region. The resistivities of the three regions have the relationship of the first region>the second region>the third region.


Find Patent Forward Citations

Kawamura, Tetsufumi. (2014). Thin-film transistor and method for manufacturing the same (U.S. Patent No. 8653517). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8653517

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