The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2014
Filed:
Feb. 26, 2010
Hajime Nishi, Hitachi, JP;
Ken Takahashi, Mito, JP;
Hiromitsu Kuroda, Hitachi, JP;
Hiroshi Okikawa, Hitachi, JP;
Kuniaki Kimoto, Hitachi, JP;
Hiroyuki Akutsu, Hitachi, JP;
Yukio Ito, Hitachi, JP;
Iku Higashidani, Hitachi, JP;
Hajime Nishi, Hitachi, JP;
Ken Takahashi, Mito, JP;
Hiromitsu Kuroda, Hitachi, JP;
Hiroshi Okikawa, Hitachi, JP;
Kuniaki Kimoto, Hitachi, JP;
Hiroyuki Akutsu, Hitachi, JP;
Yukio Ito, Hitachi, JP;
Iku Higashidani, Hitachi, JP;
Hitachi Cable, Ltd., Tokyo, JP;
Hitachi Cable Fine-Tech, Ltd., Hitachi-Shi, Ibaraki, JP;
Abstract
A solar cell lead includes a strip plate conductive material that a surface thereof is coated with solder plating. The coated solder plating includes a concavo-convex portion on a surface thereof and a 0.2% proof stress of not more than 90 MPa by a tensile test. The coated solder plating includes a hot-dip solder plating layer formed by supplying a molten solder on the surface of the strip plate conductive material. A plating temperature is set to be not higher than a liquidus-line temperature of the used solder plus 120° C., and an oxide film on a surface of the hot-dip solder plating layer is set to be not more than 7 nm in thickness.