The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 11, 2014
Filed:
Nov. 28, 2007
Dinesh Ramakrishnan, San Diego, CA (US);
Song Wang, San Diego, CA (US);
Eddie L. T. Choy, Carlsbad, CA (US);
Samir Kumar Gupta, San Diego, CA (US);
Dinesh Ramakrishnan, San Diego, CA (US);
Song Wang, San Diego, CA (US);
Eddie L. T. Choy, Carlsbad, CA (US);
Samir Kumar Gupta, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
In a digital system with more than one clock source, lack of synchronization between the clock sources may cause overflow or underflow in sample buffers, also called sample slipping. Sample slipping may lead to undesirable artifacts in the processed signal due to discontinuities introduced by the addition or removal of extra samples. To smooth out discontinuities caused by sample slipping, samples are filtered to when a buffer overflow condition occurs, and the samples are interpolated to produce additional samples when a buffer underflow condition occurs. The interpolated samples may also be filtered. The filtering and interpolation operations can be readily implemented without adding significant burden to the computational complexity of a real-time digital system.