The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 04, 2014
Filed:
Feb. 25, 2011
Kung-ling Ko, Union City, CA (US);
Tony Sonthe Nguyen, San Jose, CA (US);
Joseph Juh-en Cheng, Palo Alto, CA (US);
Tuan Van Quach, San Jose, CA (US);
Kung-Ling Ko, Union City, CA (US);
Tony Sonthe Nguyen, San Jose, CA (US);
Joseph Juh-En Cheng, Palo Alto, CA (US);
Tuan Van Quach, San Jose, CA (US);
Brocade Communications Systems, Inc., San Jose, CA (US);
Abstract
A two-port memory having a read port, a write port and a plurality of identical single-port RAM banks. The capacity of one of the single-port RAM banks is used to resolve collisions between simultaneous read and write accesses to the same single-port RAM bank. A read mapping memory stores instance information that maps logical banks and a spare bank to the single-port RAM banks for read accesses. Similarly, a write mapping memory stores write instance information that maps logical banks and a spare bank to the single-port RAM banks for write accesses. If simultaneous read and write accesses are not mapped to the same single-port RAM bank, read and write are performed simultaneously. However, if a collision exists, the write access is re-mapped to a spare bank identified by the write instance information, allowing simultaneous read and write. Both read and write mapping memories are updated to reflect any re-mapping.