The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2014

Filed:

Aug. 19, 2011
Applicants:

Irfan Rahim, Milpitas, CA (US);

Jeffrey T. Watt, Palo Alto, CA (US);

Yanzhong Xu, Santa Clara, CA (US);

Lin-shih Liu, Fremont, CA (US);

Inventors:

Irfan Rahim, Milpitas, CA (US);

Jeffrey T. Watt, Palo Alto, CA (US);

Yanzhong Xu, Santa Clara, CA (US);

Lin-Shih Liu, Fremont, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 21/336 (2006.01);
U.S. Cl.
CPC ...
Abstract

One embodiment relates to a buffered transistor device. The device includes a buffered vertical fin-shaped structure formed in a semiconductor substrate. The vertical fin-shaped structure includes at least an upper semiconductor layer, a buffer region, and at least part of a well region. The buffer region has a first doping polarity, and the well region has a second doping polarity which is opposite to the first doping polarity. At least one p-n junction that at least partially covers a horizontal cross section of the vertical fin-shaped structure is formed between the buffer and well regions. Other embodiments, aspects, and features are also disclosed.


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