The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2014

Filed:

Aug. 21, 2012
Applicants:

Chen-yen Ho, New Taipei, TW;

Chi-lun Lo, Yangmei Township, Taoyuan County, TW;

Hung-chieh Tsai, Tainan, TW;

Yu-hsin Lin, Taipei, TW;

Inventors:

Chen-Yen Ho, New Taipei, TW;

Chi-Lun Lo, Yangmei Township, Taoyuan County, TW;

Hung-Chieh Tsai, Tainan, TW;

Yu-Hsin Lin, Taipei, TW;

Assignee:

Mediatek Inc., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An amplifier, a fully-differential amplifier and a delta-sigma modulator are disclosed. The disclosed amplifier includes a front-end gain stage, an AC-coupled push-pull output stage and a compensation circuit. The compensation circuit is coupled between the front-end gain stage and an output terminal of the amplifier. The AC-coupled push-pull output stage uses an AC-coupled capacitor (which is a passive two terminal electrical component rather than a stray or parasitic capacitance of a transistor) to couple the front-end gain stage to a gate of a top or bottom transistor of a push-pull structure introduced in the AC-coupled push-pull output stage, and uses a resistance component to couple a gate of the top or bottom transistor (depending on which one is coupled to the AC-coupled capacitor) to a bias voltage level.


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