The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2014

Filed:

Nov. 11, 2010
Applicants:

Eugene M. Berdichevsky, Menlo Park, CA (US);

Song Han, Foster City, CA (US);

Yi Cui, Stanford, CA (US);

Rainer J. Fasching, Mill Valley, CA (US);

Ghyrn E. Loveness, Menlo Park, CA (US);

William S. Delhagen, Menlo Park, CA (US);

Mark C. Platshon, Menlo Park, CA (US);

Inventors:

Eugene M. Berdichevsky, Menlo Park, CA (US);

Song Han, Foster City, CA (US);

Yi Cui, Stanford, CA (US);

Rainer J. Fasching, Mill Valley, CA (US);

Ghyrn E. Loveness, Menlo Park, CA (US);

William S. DelHagen, Menlo Park, CA (US);

Mark C. Platshon, Menlo Park, CA (US);

Assignee:

Amprius, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01M 4/38 (2006.01);
U.S. Cl.
CPC ...
Abstract

Provided are conductive substrates having open structures and fractional void volumes of at least about 25% or, more specifically, or at least about 50% for use in lithium ion batteries. Nanostructured active materials are deposited over such substrates to form battery electrodes. The fractional void volume may help to accommodate swelling of some active materials during cycling. In certain embodiments, overall outer dimensions of the electrode remain substantially the same during cycling, while internal open spaces of the conductive substrate provide space for any volumetric changes in the nanostructured active materials. In specific embodiments, a nanoscale layer of silicon is deposited over a metallic mesh to form a negative electrode. In another embodiment, a conductive substrate is a perforated sheet with multiple openings, such that a nanostructured active material is deposited into the openings but not on the external surfaces of the sheet.


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