The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2014
Filed:
Apr. 05, 2011
Emrah Acar, Montvale, NJ (US);
Pradip Bose, Yorktown Heights, NY (US);
Bishop C. Brock, Coupland, TX (US);
Alper Buyuktosunoglu, White Plains, NY (US);
Michael S. Floyd, Cedar Park, TX (US);
Maria L. Pesantez, Austin, TX (US);
Gregory S. Still, Raleigh, NC (US);
Emrah Acar, Montvale, NJ (US);
Pradip Bose, Yorktown Heights, NY (US);
Bishop C. Brock, Coupland, TX (US);
Alper Buyuktosunoglu, White Plains, NY (US);
Michael S. Floyd, Cedar Park, TX (US);
Maria L. Pesantez, Austin, TX (US);
Gregory S. Still, Raleigh, NC (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A mechanism is provided for automatically tuning power proxy architectures. Based on the set of conditions related to an application being executed on a microprocessor core, a weight factor to use for each activity in a set of activities being monitored for the microprocessor core is identified, thereby forming a set of weight factors. A power usage estimate value is generated using the set of activities and the set of weight factors. A determination is made as to whether the power usage estimate value is greater than a power proxy threshold value identifying a maximum power usage for the microprocessor core. Responsive to the power usage estimate value being greater than the power proxy threshold value, a set of signals is sent to one or more on-chip actuators in the power proxy unit associated with the microprocessor core and a set of operational parameters associated with the component are adjusted.