The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2014

Filed:

Oct. 27, 2011
Applicants:

Kiran Kumar Gunnam, San Jose, CA (US);

Jay Scott Fuller, Scotts Valley, CA (US);

Inventors:

Kiran Kumar Gunnam, San Jose, CA (US);

Jay Scott Fuller, Scotts Valley, CA (US);

Assignee:

Certicom Corp., Mississauga, CA;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/00 (2013.01);
U.S. Cl.
CPC ...
Abstract

An integrated circuit comprises logic circuitry, organized in a multi-level hierarchy of modules. The integrated circuit comprises multiple sensing circuits. In operation, each sensing circuit senses an instantaneous current consumption Iof a respective one of the modules that draws current entirely through that sensing circuit. The integrated circuit comprises a concealing circuit for each of the sensing circuits. In operation, the concealing circuit receives as input a voltage Vcorresponding to the sensed instantaneous current consumption Iof its respective module, and the concealing circuit dissipates an instantaneous power Psuch that an instantaneous power sum Pof the instantaneous power Pand the instantaneous power Pto be dissipated by its respective module is substantially independent of activity of its respective module.


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