The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2014
Filed:
Mar. 02, 2010
David Reynolds, Scarborough, ME (US);
Benjamin Vigoda, Winchester, MA (US);
David Reynolds, Scarborough, ME (US);
Benjamin Vigoda, Winchester, MA (US);
Mitsubishi Electric Research Laboratories, Inc., Cambridge, MA (US);
Abstract
A circuit implementing a soft logical processing network includes an interconnection of analog processing elements, which can include soft logic gates, for instance soft Equals gates and soft XOR gates. In some examples, each of the soft logic gates include multiple circuit parts, with each part including an input configured to accept a voltage signal representation of a soft logical quantity, and a conversion section configured to use the accepted voltage representation to form a corresponding current signal. The current signals are combined to form a signal representation of the output of the gate. In an application of soft logic gates, a memory includes a group of electrical storage elements, each electrical storage elements carrying a respective storage values; a group of conversion elements, each conversion element being coupled to a respective electrical storage element for selectively converting the corresponding storage value to a current signal; and a current combination element for combining the current signals to form an output signal.