The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2014
Filed:
Sep. 10, 2010
Atchyuth K. Gorti, Austin, TX (US);
Anirudh Kadiyala, Austin, TX (US);
Bill K. Kwan, Austin, TX (US);
Venkat K Kuchipudi, Austin, TX (US);
Atchyuth K. Gorti, Austin, TX (US);
Anirudh Kadiyala, Austin, TX (US);
Bill K. Kwan, Austin, TX (US);
Venkat K Kuchipudi, Austin, TX (US);
Advanced Micro Devices, Inc., Austin, TX (US);
Abstract
A capture clock generation control mechanism is provided. The capture clock generation control mechanism controls the number of at-speed clocks generated and supplied to one or more scan chains during scan testing of a microcircuit based on control data stored in a JTAG or scan test register. The scan test register may be formed out of scan cells and comprise part of a scan chain. Automatic Test Pattern Generation (ATPG) tools may generate the data that is loaded into the scan test register to automatically configure the clock generation control mechanism. The clock control mechanism may include the ability to adjust the position of the at-speed clocks within a capture cycle, thereby facilitating transition fault detection.