The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 21, 2014
Filed:
Nov. 02, 2010
Masanao Yamaoka, White Plains, NY (US);
Kenichi Osada, Tokyo, JP;
Minoru Motoyoshi, Ome, JP;
Tetsuya Fukuoka, Hamura, JP;
Masanao Yamaoka, White Plains, NY (US);
Kenichi Osada, Tokyo, JP;
Minoru Motoyoshi, Ome, JP;
Tetsuya Fukuoka, Hamura, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
To provide an LSI having a low power mode that can prevent an apparatus on which the LSI is mounted from resulting in performance degradation, etc. even when its electric power is not reduced in the low power mode. Devised is a circuit that instructs an operation mode and detects whether the LSI operates as specified by the mode, and that measures a current at the time of the low power mode in a pseudo manner and, if despite having shifted to the low power mode, the current is not reduced actually, issues an alarm signal.