The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 21, 2014

Filed:

Aug. 20, 2010
Applicants:

Tetsuya Kawamura, Himeji, JP;

Masashi Sato, Mobara, JP;

Yoshiki Watanabe, Otaki, JP;

Hiroaki Iwato, Mobara, JP;

Masafumi Hirata, Oamishirasato, JP;

Inventors:

Tetsuya Kawamura, Himeji, JP;

Masashi Sato, Mobara, JP;

Yoshiki Watanabe, Otaki, JP;

Hiroaki Iwato, Mobara, JP;

Masafumi Hirata, Oamishirasato, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 21/8232 (2006.01);
U.S. Cl.
CPC ...
Abstract

An etching resist including first and second portions, the first portion being thicker than the second portion, is formed on a metallic layer. Through the etching resist, a semiconductor layer and the metallic layer are patterned by etching so as to form a wiring from the metallic layer and leave the semiconductor layer under the wiring. An electrical test is conducted on the wiring. The second portion is removed while the first portion is left unremoved. Selective etching is performed through the first portion so as to leave the semiconductor layer unetched to pattern the wiring to be divided into drain and source electrodes. A substrate is cut. In patterning the wiring, the wiring is etched to be cut at a position closer to a cutting line of the substrate with respect to the drain and source electrodes, while leaving the semiconductor layer unetched.


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