The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 14, 2014

Filed:

Sep. 25, 2011
Applicants:

Gordon John Faulds, Dursley, GB;

Allard Van Der Horst, Monmouthshire, GB;

Inventors:

Gordon John Faulds, Dursley, GB;

Allard Van Der Horst, Monmouthshire, GB;

Assignee:

Maxim Integrated Products, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/364 (2006.01);
U.S. Cl.
CPC ...
G06F 13/364 (2013.01);
Abstract

An example method for generating bus addresses for slave devices on a two wire interface bus includes providing a base address to each of N slave devices connected to the two wire interface bus and providing a sequence of N−1 clock pulses to each of the N slave devices to provide unique bus addresses. Circuitry within each of the example slave devices is operative to receive a base address followed by a plurality of clock pulses from the host device and to increment the base address by a digital integer. Circuitry within each of the example slave devices is further operative to terminate incrementing of the base address when an inhibit logic signal is detected at the slave program input and to save an address resulting from incrementing the base address as a bus address subsequent to terminating the incrementing of the base address.


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