The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2014

Filed:

Jul. 21, 2011
Applicant:

Hiroshi Maejima, Tokyo, JP;

Inventor:

Hiroshi Maejima, Tokyo, JP;

Assignee:

Kabushiki Kaisha, Toshiba, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor memory device includes: a memory cell array including multiple first lines, multiple second lines crossing the first lines, and memory cells arranged at intersections between the first lines and the second lines and including variable resistive elements; and a control circuit which controls resistance values of the variable resistive elements in a way that a cell voltage is applied to the memory cell arranged at an intersection between a selected first line and a selected second line by applying first and second voltages to the selected first and second lines, respectively. The control circuit applies a voltage gradually raised or lowered from a first initial voltage as the first voltage to the selected first line, and a pulsing voltage as the second voltage to the selected second line.


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