The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 31, 2013
Filed:
Aug. 01, 2008
Simon John Craske, Cambridge, GB;
Andrew Christopher Rose, Cambridge, GB;
Paul Stanley Hughes, Sunnyvale, CA (US);
Antony John Penton, Cambridge, GB;
Richard York, Cambridge, GB;
Simon Andrew Ford, Cambridge, GB;
Stuart David Biles, Suffolk, GB;
Alex James Waugh, Cambridge, GB;
Simon John Craske, Cambridge, GB;
Andrew Christopher Rose, Cambridge, GB;
Paul Stanley Hughes, Sunnyvale, CA (US);
Antony John Penton, Cambridge, GB;
Richard York, Cambridge, GB;
Simon Andrew Ford, Cambridge, GB;
Stuart David Biles, Suffolk, GB;
Alex James Waugh, Cambridge, GB;
ARM Limited, Cambridge, GB;
Abstract
A data processing apparatus is provided comprising processing circuitry for performing data processing operations, a set associative storage device for storing data values for access by the processing circuitry when performing data processing operations, error detection circuitry for performing, for each access to the storage device, an error detection operation on the data value accessed, and maintenance circuitry associated with the storage device for performing one or more maintenance operations. The processing circuitry is arranged to issue an error detection maintenance request to the maintenance circuitry specifying at least one specific physical location within the storage device, and the maintenance circuitry is responsive to the error detection maintenance request to perform at least one dummy access to the at least one specific physical location within the storage device and to provide the processing circuitry with error status information derived from the error detection operation performed by the error detection circuitry in respect of said at least one dummy access.