The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2013
Filed:
May. 22, 2009
Jing MA, Shrewsbury, MA (US);
Brian Keith Ogilvie, Holliston, MA (US);
Jing Ma, Shrewsbury, MA (US);
Brian Keith Ogilvie, Holliston, MA (US);
The Mathworks, Inc., Natick, MA (US);
Abstract
A minimum resource FFT design may calculate the FFT for an input data series using minimal logic resources to implement the FFT. In one implementation, the FFT design may include a butterfly component for performing one or more complex addition and multiplication operations and outputting a plurality of results; a first memory coupled to the butterfly component, the first memory including a number of memory banks equal in number to the number of the plurality of the results; a second memory coupled to the butterfly component, the second memory including a number of memory banks equal in number to a number of the plurality of the results; and a control component to control reading and writing from the first and second memories and the butterfly component using a ping-pong access technique that reads and writes intermediate values to the first and second memories to implement the FFT.