The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2013

Filed:

Dec. 21, 2009
Applicants:

Charles Norman, Huntington Beach, CA (US);

Andreas Warloe, Fountain Valley, CA (US);

Charles Abraham, Los Gatos, CA (US);

Jared Welz, Seal Beach, CA (US);

Inventors:

Charles Norman, Huntington Beach, CA (US);

Andreas Warloe, Fountain Valley, CA (US);

Charles Abraham, Los Gatos, CA (US);

Jared Welz, Seal Beach, CA (US);

Assignee:

Broadcom Corporation, Irvine, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A direct-sequence spread spectrum (DSSS) receiver may be operable to process signal samples in frequency domain utilizing a prime factor fast Fourier transform (FFT) circuit and a pseudorandom noise (PRN) code. The DSSS receiver may be operable to transform the signal samples into FFT signal samples using the prime factor FFT circuit, transform the PRN code into a FFT PRN code using the prime factor FFT circuit and multiply the FFT signal samples with the FFT PRN code using the prime factor FFT circuit. The DSSS receiver may be operable to inversely transform the multiplied FFT signal samples into correlated signal samples using a prime factor inverse FFT (IFFT) implemented by the prime factor FFT circuit. The prime factor FFT circuit may comprise a prime length FFT core, a FFT memory, a register bank, a switch, a multiplier and a FFT controller.


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