The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 17, 2013
Filed:
Dec. 07, 2011
Ephrem C. Wu, San Mateo, CA (US);
Gyanesh Saharia, Cupertino, CA (US);
Ephrem C. Wu, San Mateo, CA (US);
Gyanesh Saharia, Cupertino, CA (US);
Xilinx, Inc., San Jose, CA (US);
Abstract
A memory arrangement includes a plurality of memory blocks, a first group of access ports, and a second group of access ports. Routing circuitry couples each pair of the first and second groups of access ports to a respective one of the memory blocks. Each pair includes a first access port from the first group and a second access port from the second group. The first access port has write access to a first portion of the respective memory blocks but not to a second portion of the memory block, and has read access to the second portion but not to the first portion. The second access port has write access to the second portion but not to the first portion, and has read access to the first portion but not to the second portion.