The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2013

Filed:

Nov. 18, 2010
Applicant:

Paul T. Sasaki, Sunnyvale, CA (US);

Inventor:

Paul T. Sasaki, Sunnyvale, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory write interface in an integrated circuit (IC) and method of providing the same are described. An aspect relates to an apparatus for providing an input/output (IO) interface in a programmable device. The apparatus can include: a memory write interface configured to drive a memory having a daisy-chained clock, a first interface configured to receive output data from the programmable device and a second interface configured to control transmission of the output data to the memory by an IO element of the programmable device, the first interface operating according to a global clock of the programmable device and the second interface operating according to a local clock used only by the IO interface; a delay circuit configured to add a delay to the local clock with respect to the global clock; and a configuration circuit configured to adjust the delay added to the local clock to implement write-leveling at the memory.


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