Methods for fabricating deep trench capacitors

Abstract

Integrated circuits with transistors and decoupling capacitor structures are provided. A decoupling capacitor structure may include multiple deep trench structures formed in a semiconductor substrate. The deep trench structures may each be lined with high-κ dielectric material. A conductive metal layer for use in controlling threshold voltages associated with n-channel or p-channel devices may be formed over the high-κ dielectric liner. Conductive material such as aluminum may be used to fill the remaining trench cavity. The high-κ dielectric liner may be simultaneously deposited into the deep trench structures and gate regions of the transistors. In one suitable arrangement, the deep trench structures and transistor metal gates for at least a selected type of transistors may be formed in parallel. In another suitable arrangement, the deep trench structures and the transistor metal gates may be formed in separate steps.