The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2013
Filed:
Oct. 25, 2010
Applicants:
Cyrille Dray, Antibes, FR;
Alexandre Ney, Le Puy Ste Reparade, FR;
Karl Hofmann, Munich, DE;
Inventors:
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01);
U.S. Cl.
CPC ...
Abstract
Representative implementations of memory devices have transistors between memory cells of a memory device. Memory devices may be arranged in memory arrays. The use of transistors may include alternately providing electrical isolation or current paths between pairs or groups of memory cells in a memory array.
Dray, Cyrille. (2013). Nonvolatile memory architecture (U.S. Patent No. 8605479). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8605479
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile