Glonass/gps de-rotation and filtering with adc sampling at 60-80 msps

Abstract

An electronic circuit separates frequency-overlapped GLONASS and GPS overlapped in an approximately 4 MHz passband. The circuit uses a multiple-path analog-to-digital converter circuit (ADC). A sampling rate circuit is coupled to concurrently operate the analog-to-digital converter circuit at a sampling rate between about 60 Msps and about 80 Msps. A digital processing circuit includes storage defining complex de-rotation and low pass filtering. The digital processing circuit is fed by the analog-to-digital converter circuit and is operable A) to establish an access rate and respective distinct phase increments for the complex de-rotation, B) to execute the complex de-rotation by combinations of trigonometric multiplications using the distinct phase increments approximately concurrently and C) to execute the low pass filtering on the complex de-rotation resulting at the access rate and respective distinct phase increments, thus delivering GPS and Glonass signals separated from each other.