The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2013

Filed:

Jan. 16, 2012
Applicant:

Weishi Feng, San Jose, CA (US);

Inventor:

Weishi Feng, San Jose, CA (US);

Assignee:

Marvell World Trade Ltd., St. Michael, BB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A system-on-chip includes first and second memories, a descrambler, and logic. The first memory stores firmware. A first portion of the firmware is scrambled and located at a predetermined address in the first memory. The second memory stores boot code for a processor. In response to the processor being booted, the boot code instructs the processor to read the first portion of the firmware from the predetermined address in the first memory. The descrambler is configured to create a descrambled value by descrambling the first portion of the firmware. The logic is configured to, in response to the descrambled value matching a predetermined authorization code, enable a test interface that allows a device external to the system-on-chip to access the processor through the test interface. The logic is further configured to, in response to the descrambled value not matching the predetermined authorization code, disable the test interface.


Find Patent Forward Citations

Loading…