The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Jun. 23, 2010
Paul A. Bunce, Poughkeepsie, NY (US);
John D. Davis, Maybrook, NY (US);
Diana M. Henderson, Poughkeepsie, NY (US);
Jigar J. Vora, Westborough, MA (US);
Paul A. Bunce, Poughkeepsie, NY (US);
John D. Davis, Maybrook, NY (US);
Diana M. Henderson, Poughkeepsie, NY (US);
Jigar J. Vora, Westborough, MA (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method of generating a dynamic port enable signal for gating memory array data to an output node includes generating a programmable leading edge clock signal derivation of an input dynamic clock signal; generating a programmable trailing edge clock signal derivation of the input dynamic clock signal, wherein the leading edge clock signal derivation and the trailing edge clock signal derivation are independently programmable with respect to one another; and gating the generated programmable leading and trailing edge clock signal derivations with a static input enable signal so as to generate the port enable signal such that, when inactive, the port enable signal prevents early memory array data from being coupled to the output node.