The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Mar. 02, 2012
Kenichi Anzou, Kawasaki, JP;
Chikako Tokunaga, Yokohama, JP;
Kenichi Anzou, Kawasaki, JP;
Chikako Tokunaga, Yokohama, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
The built-in self-test (BIST) circuit includes an address generating circuit. The BIST circuit includes a data generating circuit. The BIST circuit includes a chip enable signal generating circuit. The BIST circuit includes a control signal generating circuit. The memory block circuit includes the multiple memories. The memory block circuit includes an address converting circuit that generates, based on the address signal, an address input signal corresponding to the address of the memory to be tested out of the multiple memories, and generates a memory selection signal for selecting the memory to be tested from the multiple memories. The memory block circuit includes a memory output selecting circuit that selects and outputs data from the memory to be tested out of the multiple memories, based on the memory selection signal.