The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 03, 2013
Filed:
Jul. 24, 2012
Nariyuki Fukuda, Kanagawa-ken, JP;
Noriyuki Moriyasu, Kanagawa-ken, JP;
Isao Ooigawa, Kanagawa-ken, JP;
Toshiyuki Furusawa, Tokyo, JP;
Satoko Kawakami, Kanagawa-ken, JP;
Hitoshi Nemoto, Kanagawa-ken, JP;
Hiroyuki Fujioka, Kanagawa-ken, JP;
Eiji Sawada, Kanagawa-ken, JP;
Tokio Tanaka, Kanagawa-ken, JP;
Nariyuki Fukuda, Kanagawa-ken, JP;
Noriyuki Moriyasu, Kanagawa-ken, JP;
Isao Ooigawa, Kanagawa-ken, JP;
Toshiyuki Furusawa, Tokyo, JP;
Satoko Kawakami, Kanagawa-ken, JP;
Hitoshi Nemoto, Kanagawa-ken, JP;
Hiroyuki Fujioka, Kanagawa-ken, JP;
Eiji Sawada, Kanagawa-ken, JP;
Tokio Tanaka, Kanagawa-ken, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to one embodiment, a semiconductor integrated circuit includes a semiconductor integrated circuit a voltage regulator providing a prescribed power-supply voltage, a plurality of delay test circuits, each of the delay test circuits being configured in each of areas where electrical current flows in response to each of operation modes, a test control unit executing a delay test using the delay test circuit under a test mode while decreasing a power-supply voltage in a stepwise fashion, a supply voltage decision unit deciding the power-supply voltage of the operation mode on a basis of the delay test, a memory unit storing the power-supply voltage of each operation mode, a supply voltage configuration unit reading out the power-supply voltage corresponding to the operation mode from the memory unit, and the supply configuration unit arranging the power-supply voltage as an output voltage of the voltage regulator when each of the operation modes starts to execute.