The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 03, 2013

Filed:

Sep. 21, 2011
Applicant:

Masayuki Hashitani, Chiba, JP;

Inventor:

Masayuki Hashitani, Chiba, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/3205 (2006.01); H01L 21/4763 (2006.01);
U.S. Cl.
CPC ...
Abstract

In a method of manufacturing a semiconductor device, a buried layer is formed in a region of a semiconductor substrate and an epitaxial growth layer is formed on the buried layer and the semiconductor substrate. Trenches are formed in the epitaxial growth layer so as to be arranged side by side in a gate width direction of a transistor to be formed, and so that an entire bottom surface of each trench is entirely surrounded by and disposed in contact with the buried layer. A gate electrode is formed inside and on a top surface of each of the trenches and on a surface of the epitaxial growth layer adjacent to each of the trenches via a gate insulating film. A high concentration source diffusion layer is formed on one side of the gate electrode. A high concentration drain diffusion layer is formed on another side of the gate electrode.


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