The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8595670 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 26, 2013

Filed:

Mar. 08, 2010
Applicants:

John Tse, San Jose, CA (US);

Neville Carvalho, Campbell, CA (US);

Inventors:

John Tse, San Jose, CA (US);

Neville Carvalho, Campbell, CA (US);

Assignee:

Altera Corporation, San Jose, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus are described for efficiently performing EDA processing to arrive at a hardware definition for a varying fraction of a large circuit design. EDA processing is conducted targeting a pseudo hardware device with sufficient capacity to embody circuitry for the varying fraction, but substantially less than the true hardware target. The novel methods and apparatus may be beneficially employed to produce reconfiguration information for circuits that include programmable logic, for example.


Find Patent Forward Citations

Tse, John. (2013). Method and apparatus for circuit block reconfiguration eda (U.S. Patent No. 8595670). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8595670

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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