The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 26, 2013
Filed:
Oct. 24, 2011
Friederich Mombers, Sunnyvale, CA (US);
Alain-serge Porret, Sunnyvale, CA (US);
Melly Thierry, Lausanne, CH;
Friederich Mombers, Sunnyvale, CA (US);
Alain-Serge Porret, Sunnyvale, CA (US);
Melly Thierry, Lausanne, CH;
SiGear Europe Sarl, Lausanne, CH;
Abstract
A method in a mixed-signal system to prevent overlapping of clock edges of one or more digital clock signals and clock edges of one or more analog clock signals where the digital clock signals and the analog clock signals are digitally controlled includes generating one or more timing window pulses that are centered around the clock edges of one of the digital clock signals or the analog clock signals; combining the timing window pulses to generate a gating signal, the gating signal having an active logical level at each of the timing window pulses; and applying the gating signal to gate or delay clock edges of the other one of the digital clock signals or the analog clock signals.