The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2013

Filed:

Nov. 06, 2009
Applicants:

Shen-iuan Liu, Taipei, TW;

Chih-hung Lee, Chiayi Hsien, TW;

Inventors:

Shen-Iuan Liu, Taipei, TW;

Chih-Hung Lee, Chiayi Hsien, TW;

Assignees:

Mediatek Inc., Hsin-Chu, TW;

National Taiwan University, Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06G 7/12 (2006.01);
U.S. Cl.
CPC ...
Abstract

A limiting amplifier with an input stage with dc offset cancellation, identical gain stages, an output buffer and a feedback filter. The input stage receives a differential input signal and outputs a first intermediate differential signal. The gain stages are cascaded to amplify the first intermediate differential signal and generate a second intermediate differential signal, amplified by the output buffer to produce an output signal. The feedback filter provides a dc offset voltage of the output signal to the input stage for the dc offset cancellation. The input stage comprises a resistor network coupled between a pair of input nodes and a power line and comprising a common resistor, a pair of load resistors and a shunt resistor. The load resistors share a common terminal connected to the common resistor that is connected to the power line. The shunt resistor has two terminals respectively connected to the load resistors.


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