The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2013

Filed:

Apr. 02, 2010
Applicants:

Malay K. Ganai, Plainsboro, NJ (US);

Chao Wang, Plainsboro, NJ (US);

Weihong LI, Plainsboro, NJ (US);

Inventors:

Malay K. Ganai, Plainsboro, NJ (US);

Chao Wang, Plainsboro, NJ (US);

Weihong Li, Plainsboro, NJ (US);

Assignee:

NEC Laboratories America, Inc., Princeton, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/60 (2006.01); G06G 7/48 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for symbolic model checking for sequential systems using a combination of state-based and state-less approaches. A state-based method is used to compute frontier states by building transition relations on-the-fly using control flow information of the system, and performing successive image computations until a memory bound is reached, and efficiently storing only the new frontier states as disjunctive partitions of Boolean and Arithmetic expressions. A stateless method is used to check reachability of given goal states from a heuristically chosen set of frontier states until depth/time bound is reached. These two methods are alternated until one of the following occurs: all frontier states are explored, all goal states are reached, all computing resources are exhausted. Even though we do not store the entire reachable state set, we guarantee a complete coverage for terminating programs without the need to compute a fixed-point.


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