The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2013
Filed:
Oct. 01, 2010
Applicants:
Jianhua Yang, Palo Alto, CA (US);
John Paul Strachan, Millbrae, CA (US);
Wei Wu, Palo Alto, CA (US);
Janice H. Nickel, Sunnyvale, CA (US);
Inventors:
Jianhua Yang, Palo Alto, CA (US);
John Paul Strachan, Millbrae, CA (US);
Wei Wu, Palo Alto, CA (US);
Janice H. Nickel, Sunnyvale, CA (US);
Assignee:
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01);
U.S. Cl.
CPC ...
Abstract
A memory array with graded resistance lines includes a first set of lines intersecting a second set of lines. A line from one of the sets of lines includes a graded resistance along a length of the line.
Quick Actions:
Yang, Jianhua. (2013). Memory array with graded resistance lines (U.S. Patent No. 8587985). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/8587985
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile