The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 8587378 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 19, 2013

Filed:

Mar. 11, 2012
Applicant:

Chandra Khandavalli, Livermore, CA (US);

Inventor:

Chandra Khandavalli, Livermore, CA (US);

Assignee:

Other;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

An analog pre-distortion linearizer having predetermined gain and phase characteristics as a function of input RF signal power is disclosed. The linearizer comprises a core circuit comprising an input terminal configured to receive an input RF signal; an output terminal configured to provide a processed version of that signal; a transistor having a gate, a drain, and a source; and a feedback circuit, presenting an impedance at the frequency of the RF signal, connected to the transistor. The gate is connected to the input terminal and the drain is connected to the output terminal. First and second dc bias voltages applied to the gate and drain respectively cause the transistor to operate at a quiescent bias point in a saturated region of the transistor I-V plane. The quiescent bias point and the impedance are selected such that the linearizer has the predetermined gain and phase characteristics.


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