The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2013
Filed:
Dec. 16, 2010
Matthew Byom, Campbell, CA (US);
Vadim Khmelnitsky, Foster City, CA (US);
Hugo Fiennes, Palo Alto, CA (US);
Arjun Kapoor, San Francisco, CA (US);
Matthew Byom, Campbell, CA (US);
Vadim Khmelnitsky, Foster City, CA (US);
Hugo Fiennes, Palo Alto, CA (US);
Arjun Kapoor, San Francisco, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
Systems and methods are disclosed for limiting power consumption of a non-volatile memory (NVM) using a power limiting scheme that distributes a number of concurrent NVM operations over time. This provides a 'current consumption cap' that fixes an upper limit of current consumption for the NVM, thereby eliminating peak power events. In one embodiment, power consumption of a NVM can be limited by receiving data suitable for use as a factor in adjusting a current threshold from at least one of a plurality of system sources. The current threshold can be less than a peak current capable of being consumed by the NVM and can be adjusted based on the received data. A power limiting scheme can be used that limits the number of concurrent NVM operations performed so that a cumulative current consumption of the NVM does not exceed the adjusted current threshold.