The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2013

Filed:

Jul. 26, 2010
Applicants:

Srihari Cadambi, Princeton, NJ (US);

Abhinandan Majumdar, Edison, NJ (US);

Michela Becchi, Princeton, NJ (US);

Srimat Chakradhar, Manalapan, NJ (US);

Hans Peter Graf, Lincroft, NJ (US);

Inventors:

Srihari Cadambi, Princeton, NJ (US);

Abhinandan Majumdar, Edison, NJ (US);

Michela Becchi, Princeton, NJ (US);

Srimat Chakradhar, Manalapan, NJ (US);

Hans Peter Graf, Lincroft, NJ (US);

Assignee:

NEC Laboratories America, Inc., Princeton, NJ (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01);
U.S. Cl.
CPC ...
Abstract

Systems and methods for massively parallel processing on an accelerator that includes a plurality of processing cores. Each processing core includes multiple processing chains configured to perform parallel computations, each of which includes a plurality of interconnected processing elements. The cores further include multiple of smart memory blocks configured to store and process data, each memory block accepting the output of one of the plurality of processing chains. The cores communicate with at least one off-chip memory bank.


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