The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2013
Filed:
Aug. 25, 2011
Yoshihiro Asakura, Chiba, JP;
Hiroshi Nagahisa, Tokyo, JP;
Hidemitsu Hohki, Tokyo, JP;
Atsushi Takahashi, Tokyo, JP;
Yukitaka Yoshida, Tokyo, JP;
Yuji Ichioka, Tokyo, JP;
Mamoru Kato, Kanagawa, JP;
Yoshihiro Asakura, Chiba, JP;
Hiroshi Nagahisa, Tokyo, JP;
Hidemitsu Hohki, Tokyo, JP;
Atsushi Takahashi, Tokyo, JP;
Yukitaka Yoshida, Tokyo, JP;
Yuji Ichioka, Tokyo, JP;
Mamoru Kato, Kanagawa, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
According to an embodiment, a control system has: a logic module substrate that has a logic FPGA on which logic is mounted, a transmission module that transmits an output logic state signal, which is logic state signal representing an interim logic state of a process by the logic FPGA of deriving a logic output signal from the logic input signals, and a logic monitoring device that displays to monitor the logic state signal transmitted from the transmission module. The logic module substrate includes an event detection unit that detects a change in the logic state signal. Only when a change in the logic state signals is detected by the event detection unit, the logic output state signal being transmitted to the transmission module.