The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 12, 2013

Filed:

Apr. 03, 2012
Applicants:

Shinichi Uchida, Kanagawa, JP;

Yoshitsugu Kawashima, Kanagawa, JP;

Hiroshi Ise, Kanagawa, JP;

Inventors:

Shinichi Uchida, Kanagawa, JP;

Yoshitsugu Kawashima, Kanagawa, JP;

Hiroshi Ise, Kanagawa, JP;

Assignee:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/544 (2006.01);
U.S. Cl.
CPC ...
Abstract

A semiconductor wafer having a plurality of interconnect layers, includes a plurality of chip-composing portions, a dicing region separating the chip-composing portions from each other, and a plurality of inter-chip interconnects formed in the dicing region and electrically connecting adjacent ones of the chip-composing portions, wherein each of the inter-chip interconnects has a width of an intermediate portion narrower than widths of connection end portions connected to the adjacent ones of the chip-composing portions.


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