The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2013
Filed:
Nov. 12, 2011
Mitsuya Kinoshita, Kanagawa, JP;
Motoo Suwa, Kanagawa, JP;
Akinobu Watanabe, Kanagawa, JP;
Shigezumi Matsui, Kanagawa, JP;
Mitsuya Kinoshita, Kanagawa, JP;
Motoo Suwa, Kanagawa, JP;
Akinobu Watanabe, Kanagawa, JP;
Shigezumi Matsui, Kanagawa, JP;
Renesas Electronics Corporation, Kawasaki-shi, JP;
Abstract
Signals outputted from an I/O buffer with a parallel drive configuration are stabilized for reliability enhancement. Each I/O cell has a complementary I/O cell that outputs one output signal as a complementary signal made up of a non-inverted signal and an inverted signal. Two I/O cells are coupled in parallel. Output portions of first inverters are coupled together through a first wiring; and output portions of second inverters are coupled together through a second wiring. The first wiring is formed on the lower side of the I/O cells so that it is astride the two I/O cells, and the second wiring is formed above the first wiring so that it is astride the two I/O cells. The wirings are laid out so that the wiring length of the first wiring and the wiring length of the second wiring are substantially equal to each other.