The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 12, 2013
Filed:
Jan. 11, 2013
Yun-mo Chung, Yongin, KR;
Ki-yong Lee, Yongin, KR;
Jin-wook Seo, Yongin, KR;
Min-jae Jeong, Yongin, KR;
Yong-duck Son, Yongin, KR;
Byung-soo SO, Yongin, KR;
Seung-kyu Park, Yongin, KR;
Byoung-keon Park, Yongin, KR;
Dong-hyun Lee, Yongin, KR;
Kil-won Lee, Yongin, KR;
Tak-young Lee, Yongin, KR;
Jong-ryuk Park, Yongin, KR;
Jae-wan Jung, Yongin, KR;
Yun-Mo Chung, Yongin, KR;
Ki-Yong Lee, Yongin, KR;
Jin-Wook Seo, Yongin, KR;
Min-Jae Jeong, Yongin, KR;
Yong-Duck Son, Yongin, KR;
Byung-Soo So, Yongin, KR;
Seung-Kyu Park, Yongin, KR;
Byoung-Keon Park, Yongin, KR;
Dong-Hyun Lee, Yongin, KR;
Kil-Won Lee, Yongin, KR;
Tak-Young Lee, Yongin, KR;
Jong-Ryuk Park, Yongin, KR;
Jae-Wan Jung, Yongin, KR;
Samsung Display Co., Ltd., Yongin, Gyeonggi-Do, KR;
Abstract
A substrate including a thin film transistor, the substrate including an active layer disposed on the substrate, the active layer including a channel area and source and drain areas, a gate electrode disposed on the active layer, the channel area corresponding to the gate electrode, a gate insulating layer interposed between the active layer and the gate electrode, an interlayer insulating layer disposed to cover the active layer and the gate electrode, the interlayer insulating layer having first and second contact holes partially exposing the active layer, source and drain electrodes disposed on the interlayer insulating layer, the source and drain areas corresponding to the source and drain electrodes, and ohmic contact layers, the ohmic contact layers being interposed between the interlayer insulating layer and the source and drain electrodes, and contacting the source and drain areas through the first and second contact holes.