The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 05, 2013
Filed:
Feb. 17, 2011
Dexter T Chun, San Diego, CA (US);
Jack K Wolf, San Diego, CA (US);
Jungwon Suh, San Diego, CA (US);
Tirdad Sowlati, San Diego, CA (US);
Dexter T Chun, San Diego, CA (US);
Jack K Wolf, San Diego, CA (US);
Jungwon Suh, San Diego, CA (US);
Tirdad Sowlati, San Diego, CA (US);
Qualcomm Incorporated, San Diego, CA (US);
Abstract
A system involves a first SerDes link from a first integrated circuit (IC) to a second IC and a second link from the second IC to the first IC. Power consumption settings in circuitry of the first link are adjusted to control power consumption such that the bit error rate of the first link is maintained in a range, where the lower bound of the range is substantially greater than zero. Power consumption settings in circuitry for the second link are adjusted to control power consumption such that the bit error rate of the second link is maintained in range, where the lower bound of the range is substantially greater than zero. In one example, circuitry in the second IC detects errors in the first link and reports back via the second link. The first IC uses the reported information to determine a bit error rate for the first link.