The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2013

Filed:

Feb. 03, 2012
Applicants:

Yaowu MO, San Ramon, CA (US);

Chen Xu, San Jose, CA (US);

Min Qu, Sunnyvale, CA (US);

Tiejun Dai, Santa Clara, CA (US);

Rui Wang, San Jose, CA (US);

Xiaodong Luo, Saratoga, CA (US);

Inventors:

Yaowu Mo, San Ramon, CA (US);

Chen Xu, San Jose, CA (US);

Min Qu, Sunnyvale, CA (US);

Tiejun Dai, Santa Clara, CA (US);

Rui Wang, San Jose, CA (US);

Xiaodong Luo, Saratoga, CA (US);

Assignee:

OmniVision Technologies, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 23/64 (2006.01); H03K 21/02 (2006.01); H03K 21/00 (2006.01); H03K 23/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of multiplexers. Each of the plurality of flip-flops is coupled to be in one of a toggle state, a keep state, a reset state or a set state based on inputs received from the plurality of multiplexers. Other embodiments are described.


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