The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2013

Filed:

Jul. 05, 2011
Applicants:

Nam Kyeong Kim, Icheon-si, KR;

Kyoung Chul Yang, Cheongju-si, KR;

Young Jin Woo, Daejeon, KR;

Tae Hyun Kim, Seongnam-si, KR;

Inventors:

Nam Kyeong Kim, Icheon-si, KR;

Kyoung Chul Yang, Cheongju-si, KR;

Young Jin Woo, Daejeon, KR;

Tae Hyun Kim, Seongnam-si, KR;

Assignee:

SK hynix Inc., Icheon-Si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01);
U.S. Cl.
CPC ...
Abstract

A nonvolatile memory device includes memory cell blocks each configured to comprise memory cells erased by an erase voltage, supplied to a word line, and a bulk voltage supplied to a bulk, a bias voltage generator configured to generate a first erase voltage, having a first pulse width and a first amplitude, in order to perform the erase operation of the memory cells and a second erase voltage, having a second pulse width narrower than the first pulse width and a second amplitude lower than the first amplitude, in order to perform an additional erase operation if an unerased memory cell is detected after the erase operation is performed, and a bulk voltage generator configured to generate the bulk voltage.


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