The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2013

Filed:

Feb. 24, 2012
Applicants:

Ozan E. Erdogan, Sunnyvale, CA (US);

Guozhong Shen, San Jose, CA (US);

Rajesh Anantharaman, San Jose, CA (US);

Ajay Taparia, Santa Clara, CA (US);

Behrooz Javid, Irvine, CA (US);

Syed T. Mahmud, Dublin, CA (US);

Inventors:

Ozan E. Erdogan, Sunnyvale, CA (US);

Guozhong Shen, San Jose, CA (US);

Rajesh Anantharaman, San Jose, CA (US);

Ajay Taparia, Santa Clara, CA (US);

Behrooz Javid, Irvine, CA (US);

Syed T. Mahmud, Dublin, CA (US);

Assignee:

Maxim Integrated Products, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

A mixed signal correlator utilizes coherent detection within a capacitance measurement application. In some applications, the mixed signal correlator is used to measure capacitance of a touch screen display. An external capacitor whose capacitance is measured is kept small for improved sensitivity and can be used for a variety of applications having varied integration periods for measurement. The external capacitor is kept small and can be used for varied applications by adjusting the output voltage within a range that is less than the supply voltage, and maintaining a count of the adjustments to later reconstruct an actual output voltage for the integration period. An output is a weighted sum of an analog integrator output and a digital counter output.


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