The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 29, 2013

Filed:

Sep. 06, 2012
Applicants:

Konstantinos Sarrigeorgidis, Sunnyvale, CA (US);

Yanni Chen, Sunnyvale, CA (US);

Leilei Song, Sunnyvale, CA (US);

Kedar Shirali, San Jose, CA (US);

Inventors:

Konstantinos Sarrigeorgidis, Sunnyvale, CA (US);

Yanni Chen, Sunnyvale, CA (US);

Leilei Song, Sunnyvale, CA (US);

Kedar Shirali, San Jose, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 27/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Methods and apparatus are provided for performing log-likelihood ratio (LLR) computations in a pipeline. Portions of a metric used to compute LLR values are computed in one pipeline part. The portions correspond to all permutations of some received signal streams. The portions are combined with one permutation xof the received signal stream that was not included in the previous pipeline computation in a subsequent pipeline part to produce M values associated with a particular bit position. At each subsequent clock cycle, a different permutation of xis combined with the previously computed portions producing different M values. State values corresponding to different values of bit positions of the received stream are computed by finding the minimum among the M values, in each clock cycle, that affect a particular bit position. The state values are combined to compute the LLR values for the bit position in a final pipeline part.


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