The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2013
Filed:
Jun. 01, 2009
Xiaofei Dong, Sunnyvale, CA (US);
Xiaofei Dong, Sunnyvale, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
Embodiments of the present invention provide methods and systems for implementing a digital up converter (DUC) in an integrated circuit (IC). The method includes serializing a plurality of inputs to obtain a serial output and then increasing the sample rate of the serial output. Additionally, the method generates signal pairs (sine, cosine) for the desired carrier frequencies using time division multiplexing (TDM). Some of the signal pairs are delayed by one period within the TDM cycle to generate delayed signal pairs. The serial output is distributed, after the increase of the sample rate, to a plurality of filters to further increase the sample rate, each filter outputting a subset of the plurality of inputs using TDM. In one embodiment, the plurality of inputs includes 8 input pairs and the plurality of filters includes 6 Cascaded Integrator-Comb (CIC) filters operating in three-fold TDM. Further, one operation of the method combines the outputs from the plurality of filters with one of the signals from a corresponding signal pair or delayed signal pair. The result of the combination is sent to a digital to analog converter for transmission by one or more antennas.