The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 15, 2013
Filed:
May. 13, 2011
Vladimir Alexsandrovich Ermolov, Espoo, FI;
Meri Sari Helle, Helsinki, FI;
Pirjo Marjaana Pasanen, Helsinki, FI;
Markku Anttoni Oksanen, Helsinki, FI;
Eira Tuulia Seppala, Helsinki, FI;
Vladimir Alexsandrovich Ermolov, Espoo, FI;
Meri Sari Helle, Helsinki, FI;
Pirjo Marjaana Pasanen, Helsinki, FI;
Markku Anttoni Oksanen, Helsinki, FI;
Eira Tuulia Seppala, Helsinki, FI;
Nokia Corporation, Espoo, FI;
Abstract
An apparatus including a first electrode portion configured to inject charge carriers; a second electrode portion configured to collect charge carriers and provide an output signal; a third electrode portion configured to collect charge carriers and provide an output signal; a monolithic semiconductor, providing a first channel for the transport of injected charge carriers between the first electrode portion and the second electrode portion and providing a second channel for the transport of injected charge carriers between the first electrode portion and the third electrode portion, wherein the first channel is configured such that a charge carrier injected at the first electrode portion will reach the second electrode portion via the first channel after a first transport time and the second channel is configured such that a charge carrier injected at the first electrode portion will reach the third electrode portion via the second channel after a second transport time greater than the first transport time; and at least one gate electrode coupled to the monolithic semiconductor configured to enable switching a route for charge carrier transport between at least the first channel and the second channel.