The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 15, 2013

Filed:

Mar. 01, 2012
Applicants:

Meng-hsien Chen, Taichung, TW;

Chung-yung Ai, Taichung, TW;

Chih-wei Hsiung, Taichung, TW;

Inventors:

Meng-Hsien Chen, Taichung, TW;

Chung-Yung Ai, Taichung, TW;

Chih-Wei Hsiung, Taichung, TW;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/732 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method for fabricating a vertical transistor comprises steps: forming a plurality of first trenches in a substrate; sequentially epitaxially growing a first polarity layer and a channel layer inside the first trenches, and forming a first retard layer on the channel layer; etching the first retard layer and the channel layer along the direction vertical to the first trenches to form a plurality of pillars; respectively forming a gate on a first sidewall and a second sidewall of each pillar; removing the first retard layer on the pillar; and epitaxially growing a second polarity layer on the pillar. The present invention is characterized by using an epitaxial method to form the first polarity layer, the channel layer and the second polarity layer and has the advantage of uniform ion concentration distribution. Therefore, the present invention can fabricate a high-quality vertical transistor.


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