The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 08, 2013

Filed:

Jun. 10, 2011
Applicants:

Brian J. Campbell, Cupertino, CA (US);

Daniel C. Murray, Morgan Hill, CA (US);

Conrad H. Ziesler, Seattle, WA (US);

Inventors:

Brian J. Campbell, Cupertino, CA (US);

Daniel C. Murray, Morgan Hill, CA (US);

Conrad H. Ziesler, Seattle, WA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
Abstract

A memory may include a memory array, a plurality of control circuits, and a plurality of isolation circuits. The plurality of control circuits may be configured to generate control signals for the memory array. For example, the plurality of control circuits may include a plurality of word line driver circuits. The plurality of isolation circuits may be configured to receive the control signals from the plurality of control circuits and a plurality of isolation signals. A first isolation signal may correspond to the plurality of word line driver circuits and at least one second isolation signal may correspond to other ones of the plurality of control circuits. The first isolation signal and the second isolation signal may be independently controlled during memory tests to detect stuck-at faults associated with the plurality of isolation signals.


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