The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 08, 2013
Filed:
Sep. 22, 2011
Yoshifumi Nishi, Kanagawa-ken, JP;
Daisuke Hagishima, Kanagawa-ken, JP;
Shinichi Yasuda, Tokyo, JP;
Tetsufumi Tanamoto, Kanagawa-ken, JP;
Takahiro Kurita, Kanagawa-ken, JP;
Atsuhiro Kinoshita, Kanagawa-ken, JP;
Shinobu Fujita, Tokyo, JP;
Yoshifumi Nishi, Kanagawa-ken, JP;
Daisuke Hagishima, Kanagawa-ken, JP;
Shinichi Yasuda, Tokyo, JP;
Tetsufumi Tanamoto, Kanagawa-ken, JP;
Takahiro Kurita, Kanagawa-ken, JP;
Atsuhiro Kinoshita, Kanagawa-ken, JP;
Shinobu Fujita, Tokyo, JP;
Kabushiki Kaisha Toshiba, Tokyo, JP;
Abstract
An aspect of the present embodiment, there is provided a nonvolatile programmable logic switch including a first memory cell transistor, a second memory cell transistor, a pass transistor and a first substrate electrode applying a substrate voltage to the pass transistor, wherein a writing voltage is applied to the first wiring, a first voltage is applied to one of a second wiring and a third wiring and a second voltage which is lower than the first voltage is applied to the other of the second wiring and the third wiring, and the first substrate voltage which is higher than the second voltage and lower than the first voltage is applied to a well of the pass transistor, when data is written into the first memory cell transistor or the second memory cell transistor.